TY - JOUR 
A1 - Díaz Madrid, José Ángel
AU - Doménech Asensi, Ginés
AU - Hauer, Johann
AU - Mateu, Loreto
T1 - A low kickback fully differential dynamic comparator for pipeline analog-to-digital converters
Y1 - 2019
SN - 2577-8196
UR - http://hdl.handle.net/10317/8340
AB - This study presents a fully differential dynamic comparator with low kickback noise, an effect caused by voltage variations in the regeneration nodes of these types of circuit. Given their low power dissipation, dynamic comparators are key circuits in analog-to-digital converters (ADCs), especially in pipelined ADCs. The proposed comparator has been simulated and compared with three other comparator topologies. The value of the kickback noise generated by the proposed circuit is lower than that generated by other conventional dynamic comparators over a wide input range, while simultaneously showing a low offset voltage error. The dynamic comparator has been implemented in a low-resolution ADC with a resolution of 2.5 effective bits, which has been
prototyped in a 0.35-𝜇m CMOS AMS C35B4 process. Its size is 34 𝜇m × 38 𝜇m.
KW - Electrónica
KW - ADC
KW - Analog circuit
KW - Complementary metal-oxide-semiconductor,
KW - Dynamic comparator
LA - eng
PB - John Wiley & Sons Ltd
ER -