TY - JOUR 
A1 - Martínez Álvarez, José Javier
AU - Ferrández Vicente, José Manuel
AU - Toledo Moreo, Francisco Javier
T1 - Discrete-time cellular neural networks in FPGA
Y1 - 2007
UR - http://hdl.handle.net/10317/1421
AB - This paper describes a novel architecture for the hardware implementation of non-linear multi-layer cellular neural networks. This makes it feasible to design CNNs with millions of neurons accommodated in low price FPGA devices, being able to process standard video in real time.
KW - Arquitectura y Tecnología de Computadoras
KW - Arquitectura de hardware
KW - Sistemas de tiempo discreto
KW - Campo de las matrices de puerta programable
KW - Perceptrones multicapa
KW - Chip neuronales
KW - Arquitectura de red neuronal
KW - FPGA
KW - Hardware arquitecture
KW - Discrete time system
KW - Field programmable gate array
KW - Multilayer perceptron
KW - Neural chip
KW - Neural net architecture
LA - eng
PB - IEEE Computer Society
ER -