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HANNA: a tool for hardware prototyping and benchmarking of ANNs. Póster
dc.contributor.author | Garrigós Guerrero, Francisco Javier | |
dc.contributor.author | Martínez Álvarez, José Javier | |
dc.contributor.author | Ferrández Vicente, José Manuel | |
dc.contributor.author | Toledo Moreo, Francisco Javier | |
dc.date.accessioned | 2009-04-21T06:40:41Z | |
dc.date.available | 2009-04-21T06:40:41Z | |
dc.date.issued | 2007-06-23 | |
dc.identifier.citation | GARRIGÓS GUERRERO, Javier et al. HANNA: a tool for hardware prototyping and benchmarking of ANNs. En: International Work Conference on the Interplay between Natural and Artificial Computation . IWINAC 2007 (2ª: La Manga del Mar Menor, Murcia, Spain: 2007). Nature Inspired Problem-Solving Methods in Knowledge Engineering. Berlin: Springer, 2007. Pp. 10-18. ISBN 978-3-540-73054-5 | es |
dc.identifier.isbn | 978-3-540-73054-5 | |
dc.identifier.issn | 0302-9743 (Print) 1611-3349 (Online) | |
dc.description.abstract | For some applications, designers must implement an ANN model over different platforms to meet performance, cost or power constrains, a process still more painful when several hardware implementations have to be evaluated. Continuous advances in VLSI technologies, computer architecture and software development make it difficult to find the adequate implementation platform. HANNA (Hardware ANN Architect), is a tool designed to automate the generation of hardware prototypes of MLP-like neural networks over FPGA devices. Coupled with traditional Matlab/Simulink environments the model can be synthesized, downloaded to the FPGA and co-simulated with the software version to trade off area, speed and precision requirements. | es |
dc.description.sponsorship | This research is being funded by Ministerio de Ciencia y Tecnología TIC 2003-09557-C02-02. | es |
dc.format | application/pdf | |
dc.language.iso | eng | es |
dc.publisher | Springer Berlin | es |
dc.rights | The original publication is available at www.springerlink.com | es |
dc.title | HANNA: a tool for hardware prototyping and benchmarking of ANNs. Póster | es |
dc.type | info:eu-repo/semantics/conferenceObject | es |
dc.subject.other | Arquitectura y Tecnología de Computadoras | es |
dc.subject | Tecnologías VLSI | es |
dc.subject | Arquitectura de hardware | es |
dc.subject | HANNA (Hardware ANN Architect) | es |
dc.subject | Artificial neural networks | |
dc.identifier.uri | http://hdl.handle.net/10317/908 | |
dc.contributor.investgroup | Grupo Dispositivos y Diseño Microelectrónico | es |
dc.contributor.investgroup | Grupo Diseño Electronico y Técnicas de Tratamiento de Señales | |
dc.identifier.doi | 10.1007/978-3-540-73055-2_2 |
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