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dc.contributor.authorGarrigós Guerrero, Francisco Javier 
dc.contributor.authorMartínez Álvarez, José Javier 
dc.contributor.authorFerrández Vicente, José Manuel 
dc.contributor.authorToledo Moreo, Francisco Javier 
dc.date.accessioned2009-04-21T06:40:41Z
dc.date.available2009-04-21T06:40:41Z
dc.date.issued2007-06-23
dc.identifier.citationGARRIGÓS, Javier, MARTÍNEZ, José J., TOLEDO, Javier, FERNÁNDEZ, José M. HANNA: a tool for hardware prototyping and benchmarking of ANNs. En: International Work Conference on the Interplay between Natural and Artificial Computation . IWINAC 2007 (2ª: La Manga del Mar Menor, Murcia, Spain: 2007 ). Nature Inspired Problem-Solving Methods in Knowledge Engineering. Berlin: Springer, 2007. 10-18 p. (Serie: Lecture Notes in Computer Science, ISSN 0302-9743 (Print) 1611-3349 (Online) ). ISBN 978-3-540-73054-5es
dc.identifier.isbn978-3-540-73054-5
dc.identifier.issn0302-9743 (Print) 1611-3349 (Online)
dc.description.abstractFor some applications, designers must implement an ANN model over different platforms to meet performance, cost or power constrains, a process still more painful when several hardware implementations have to be evaluated. Continuous advances in VLSI technologies, computer architecture and software development make it difficult to find the adequate implementation platform. HANNA (Hardware ANN Architect), is a tool designed to automate the generation of hardware prototypes of MLP-like neural networks over FPGA devices. Coupled with traditional Matlab/Simulink environments the model can be synthesized, downloaded to the FPGA and co-simulated with the software version to trade off area, speed and precision requirements.es
dc.description.sponsorshipThis research is being funded by Ministerio de Ciencia y Tecnología TIC 2003-09557-C02-02.es
dc.formatapplication/pdf
dc.language.isoenges
dc.publisherSpringer Berlines
dc.rightsThe original publication is available at www.springerlink.comes
dc.titleHANNA: a tool for hardware prototyping and benchmarking of ANNs. Posteres
dc.typeinfo:eu-repo/semantics/conferenceObjectes
dc.subjectTecnologías VLSIes
dc.subjectArquitectura de hardwarees
dc.subjectHANNA (Hardware ANN Architect)es
dc.subjectArtificial neural networks
dc.subject.otherArquitectura y Tecnología de Computadorases
dc.identifier.urihttp://hdl.handle.net/10317/908
dc.contributor.investgroupGrupo Dispositivos y Diseño Microelectrónicoes
dc.contributor.investgroupGrupo Diseño Electronico y Técnicas de Tratamiento de Señales
dc.identifier.doi10.1007/978-3-540-73055-2_2


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