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dc.contributor.authorDíaz Madrid, José Ángel 
dc.contributor.authorDoménech Asensi, Ginés 
dc.contributor.authorHauer, Johann 
dc.contributor.authorMateu, Loreto 
dc.date.accessioned2020-01-24T11:27:49Z
dc.date.available2020-01-24T11:27:49Z
dc.date.issued2019-11-10
dc.identifier.citationDiaz-Madrid J-A, Domenech-Asensi G, Hauer J, Mateu L. A low kickback fully differential dynamic comparator for pipeline analog-to-digital converters. Engineering Reports. 2019;e12055. https://doi.org/10.1002/eng2.12055es_ES
dc.identifier.issn2577-8196
dc.description.abstractThis study presents a fully differential dynamic comparator with low kickback noise, an effect caused by voltage variations in the regeneration nodes of these types of circuit. Given their low power dissipation, dynamic comparators are key circuits in analog-to-digital converters (ADCs), especially in pipelined ADCs. The proposed comparator has been simulated and compared with three other comparator topologies. The value of the kickback noise generated by the proposed circuit is lower than that generated by other conventional dynamic comparators over a wide input range, while simultaneously showing a low offset voltage error. The dynamic comparator has been implemented in a low-resolution ADC with a resolution of 2.5 effective bits, which has been prototyped in a 0.35-𝜇m CMOS AMS C35B4 process. Its size is 34 𝜇m × 38 𝜇m.es_ES
dc.description.sponsorshipThis work has been partially funded by Spanish government projects TEC2015‐66878‐C3‐2‐R (MINECO/FEDER, UE) and RTI2018‐097088‐B‐C33 (MINECO/FEDER, UE).es_ES
dc.formatapplication/pdfes_ES
dc.language.isoenges_ES
dc.publisherJohn Wiley & Sons Ltdes_ES
dc.relation.urihttps://onlinelibrary.wiley.com/doi/epdf/10.1002/eng2.12055es_ES
dc.rightsAtribución-NoComercial-SinDerivadas 3.0 España*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/3.0/es/*
dc.titleA low kickback fully differential dynamic comparator for pipeline analog-to-digital converterses_ES
dc.typeinfo:eu-repo/semantics/articlees_ES
dc.subjectADC,es_ES
dc.subjectAnalog circuites_ES
dc.subjectComplementary metal-oxide-semiconductor,es_ES
dc.subjectDynamic comparatores_ES
dc.subject.otherElectrónicaes_ES
dc.identifier.urihttp://hdl.handle.net/10317/8340
dc.peerreviewes_ES
dc.identifier.doi10.1002/eng2.12055
dc.rights.accessRightsinfo:eu-repo/semantics/openAccesses_ES
dc.type.versioninfo:eu-repo/semantics/acceptedVersiones_ES
dc.relation.projectIDRTI2018-097088-B-C33es_ES
dc.relation.projectIDTEC2015-66878-C3-2-Res_ES
dc.contributor.convenianteFraunhofer Institute IISes_ES
dc.contributor.convenianteUniversidad Politécnica de Cartagenaes_ES
dc.contributor.funderFondo Europeo de Desarrollo Regionales_ES
dc.contributor.funderComisión Europeaes_ES
dc.contributor.funderMinisterio de Economia y Competitividades_ES


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