Stability and efficiency of explicit integration in interconnect analysis on GPUs
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Desarrollo de sistemas y circuitos electrónicos y microelectrónicosÁrea de conocimiento
ElectrónicaPatrocinadores
This work has been partially funded by Spanish government through project RTI2018-097088-B-C33 (MINECO/FEDER, UE) and by EPSRC (the UK Engineering and Physical Sciences Research Council) under grant EP/N0317681/1. The research stay at The University of Southampton has been supported by Fundacion Séneca-Agencia de Ciencia y Tecnología de la Región de Murcia, Programa Regional de Movilidad, Colaboración e Intercambio de Conocimiento Jimenez de la Espada under grant 21187/EE/19Realizado en/con
University of Southampton (UK)Fecha de publicación
2020-10-31Editorial
IEEECita bibliográfica
DOMÉNECH ASENSI, Ginés y KAZMIERSKI, Tom J. Stability and Efficiency of Explicit Integration in Interconnect Analysis on GPUs. En: IEEE International Symposium on Circuits and Systems (ISCAS), 2020, pp. 1-5, doi: 10.1109/ISCAS45731.2020.9181157.Revisión por pares
SíPalabras clave
Simulation accelerationState-space technique
Many-core computer
GPU
Resumen
This paper presents a technique to parallelise a numeric integration solver on general purpose GPU. The technique is based on the combination of space state modeling with an explicit integration method based on the Adams-Bashforth second order formula. The paper studies the stability of variable step explicit method and proposes a technique to guarantee integration stability using this technique. Although explicit methods require smaller integration steps compared to the traditional implicit techniques, they avoid the complex calculations on large which are used to solve the last ones. The technique is demonstrated simulating an RC model of an VLSI interconnect. Results achieved by the proposed variable step explicit method is compared to those achieved by a traditional implicit integration based simulator like Ngspice. The results show that the parallelised explicit solution is one order of
magnitude faster than the implicit one for increasingly complex circuits.
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