Discrete-time cellular neural networks in FPGA
Author
Martínez Álvarez, José Javier; Ferrández Vicente, José Manuel; Toledo Moreo, Francisco JavierResearch Group
Grupo de Diseño Electrónico y Técnicas de Tratamiento de señalKnowledge Area
Arquitectura y Tecnología de ComputadorasSponsors
This research has been funded by MTyAS of Spain, IMSERSO RETVIS 150/06.Publication date
2007-04Publisher
IEEE Computer SocietyBibliographic Citation
MARTÍNEZ ÁLVAREZ, José Javier; FERRÁNDEZ VICENTE, José Manuel y TOLEDO MOREO, Francisco Javier. Discrete-time cellular neural networks in FPGA. En: Annual IEEE Symposium on Field-Programmable Custom Computing Machines (15º: 2007: Napa, California) 15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2007. 23-25 April 2007 Napa, California. Los Alamitos, California: IEEE Computer Society, 2007. Pp. 293-294. ISBN 978-0-7695-2940-0Keywords
Arquitectura de hardwareSistemas de tiempo discreto
Campo de las matrices de puerta programable
Perceptrones multicapa
Chip neuronales
Arquitectura de red neuronal
FPGA
Hardware arquitecture
Discrete time system
Field programmable gate array
Multilayer perceptron
Neural chip
Neural net architecture
Abstract
This paper describes a novel architecture for the hardware implementation of non-linear multi-layer cellular neural networks. This makes it feasible to design CNNs with millions of neurons accommodated in low price FPGA devices, being able to process standard video in real time.
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