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dc.contributor.authorPavón Mariño, Pablo 
dc.contributor.authorGarcía Haro, Juan 
dc.contributor.authorJajszczyk, Andrzej 
dc.date.accessioned2011-01-11T12:28:16Z
dc.date.available2011-01-11T12:28:16Z
dc.date.issued2007-10
dc.identifier.citationPAVÓN MARIÑO, P. GARCÍA HARO, J., JAJSZCYK, A. Parallel Desynchronized Block Matching: A Feasible Scheduling Algorithm for the Input-Buffered Wavelength-Routed Switch. Computer Networks, 51 (15): 4270-4283, October 2007. ISSN 1389-1286en_US
dc.identifier.issn1389-1286
dc.description.abstractThe input-buffered wavelength-routed (IBWR) switch is a promising switching architecture for slotted optical packet switching (OPS) networks. The benefits of the IBWR fabric are a better scalability and lower hardware cost, when compared to output buffered OPS proposals. A previous work characterized the scheduling problem of this architecture as a type of matching problem in bipartite graphs. This characterization establishes an interesting relation between the IBWR scheduling and the scheduling of electronic virtual output queuing switches. In this paper, this relation is further explored, for the design of feasible IBWR scheduling algorithms, in terms of hardware implementation and execution time. As a result, the parallel desynchronized block matching (PDBM) algorithm is proposed. The evaluation results presented reveal that IBWR switch performance using the PDBM algorithm is close to the performance bound given by OPS output buffered architectures. The performance gap is especially small for dense wavelength division multiplexing (DWDM) architectures.en_US
dc.description.sponsorshipThis research has been funded by the Spanish MCyT grant TEC2004-05622-C04-02/TCM (ARPaq). Authors would like to thank also the COST 291 action and the e-Photon/ONe+ European Network of Excellence.en_US
dc.formatapplication/pdf
dc.language.isoengen_US
dc.publisherElsevieren_US
dc.rightsCopyright © 2007 Elsevier B.Ven_US
dc.titleParallel Desynchronized Block Matching: A Feasible Scheduling Algorithm for the Input-Buffered Wavelength-Routed Switchen_US
dc.typeinfo:eu-repo/semantics/articleen_US
dc.subject.otherIngeniería Telemáticaen_US
dc.subjectConmutación de paquetes ópticosen_US
dc.subjectProgramación de algoritmosen_US
dc.subjectEvaluación del rendimientoen_US
dc.subjectOptical Packet Switchingen_US
dc.subjectScheduling algorithmsen_US
dc.subjectPerformance evaluationen_US
dc.identifier.urihttp://hdl.handle.net/10317/1536
dc.peerreviewen_US
dc.contributor.investgroupGrupo de Ingeniería Telemática (GIT)en_US
dc.identifier.doi10.1016/j.comnet.2007.05.004


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